A friend of mine who is also a verification engineer lamented to me that Cadence didn't seem to be supporting SystemVerilog very well. This is what fell out of my head and into the email reply I sent him.
I notice that Cadence bloggers seem to all like specmen E better than systemverilog, and synopsys people, of course, like VMM more than anything else. So, I guess I’m not surprised that Cadence isn’t supporting SystemVerilog that well. The EDA industry is weird. I like how the software world, with open source, collaborates so well on developing the best tools for everyone. There almost needs to be a Linux-like simulator that everyone in EDA rallies around and works together on. Or if Linux isn’t the best comparison, maybe gcc, or firefox, or apache. They are defacto standard tools now in the software world. In the software world, if you have a new compiled language, you pretty much have to write a gcc (Gnu Compiler Collection) compiler for it. If you have an idea for a webserver improvement, better make it an apache module. If you are writing a cool web app, it has to work well on firefox. Any new programming tool (revision control, linter, profiler, debugger) has to run under Linux or nobody is going to notice it. If you are interested in OS schedulers, filesystems, memory managers, etc., and you want industry and academia to take notice, you make your scheduler, filesystem, memory manager, etc. work with Linux. Since those are all open source projects, it’s not that hard to do any of that.
If EDA worked the same there would be one open source simulator that supported verilog, vhdl, SystemVerilog, SystemC, e, vera, and about 10 other obscure languages that people had dreamed up over the years. It would run on 20 different operating systems and support all kinds of logging, debuggers, coverage, and waveform formats. Acellera would prototype new standards in beta versions of the simulator. You’d get support on email lists and HOWTO web pages and wikis, often directly from the people writing the code.
I think the thing about software tools is, if you write software, you have the skills to understand and modify your own tools. If you design circuits, you might not have the skills to understand and improve your simulator. Software people could do it, but if it’s not a tool they are likely to use themselves, they probably aren’t going to be very interested. The EDA world in general is also a lot smaller than the software world so the chances of someone having the Linus like motivation to tackle a project like that are much smaller. Instead we EDA engineers beg and plead and pay out the nose for Cadence, Mentor, and Synopsys to do everything for us. They are careful to make everything an open standard now (like e, for example), but if nobody, or only one company supports that standard, does it matter?